1. Field of the Invention
The present invention relates to a semiconductor memory device, and more particularly, to an improvement of the read operation speed of a dynamic random access memory (DRAM) device.
2. Description of the Related Art
In a prior art semiconductor memory device including a plurality of sense amplifiers arranged in rows, columns, a plurality of local data input/output line pairs, each pair being connected to one row of the sense amplifiers, a global data input/output line pair, and a plurality of switches each connected between one of the local data input/output line pairs and the global data input/output line pair, a pull-up circuit and a differential amplifier are connected to the global data input/output line pair. In this case, the pull-up circuit is provided near the differential amplifier. This will be explained later in detail.
In the above-described prior art semiconductor memory device, however, the pull-up circuit is provided near the differential amplifier, the amount of signals supplied to the differential amplifier is so small that the read operation speed is decreased. This also will be explained later in detail.